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Top AI Repos tracks AI repositories on GitHub and answers two different questions about each one: is it moving right now, and would you bet a product on it.
Top AI Repos tracks AI repositories on GitHub and answers two different questions about each one: is it moving right now, and would you bet a product on it.
| Date | Stars |
|---|---|
| 2026-07-31 | 293 |
| 2026-08-06 | 293 |
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# LLM4EDA: Emerging Progress in Large Language Models for Electronic Design Automation - We would like to maintain a list of resources that utilize Large Language Models to solve problems in Electronic Design Automation - [LLM4EDA Paper Link](https://arxiv.org/abs/2401.12224) - Also see our maintaining list for [Awesome Artificial Intelligence for Electronic Design Automation](https://github.com/Thinklab-SJTU/awesome-ai4eda) - *Maintained by members in SJTU-Thinklab: Ruizhe Zhong, Xingbo Du* ## Assistant Chatbot - **Users can interact with LLMs for knowledge acquisition and Q&A, providing user-friendly and easy-interactively assistant chatbot and bring us new interaction paradigm with EDA software.** 1. ChipNeMo: Domain-Adapted LLMs for Chip Design 2. New Interaction Paradigm for Complex EDA Software Leveraging GPT 3. From English to PCSEL: LLM helps design and optimize photonic crystal surface emitting lasers 4. RapidGPT: Your Ultimate HDL Pair-Designer 5. EDA Corpus: A Large Language Model Dataset for Enhanced Interaction with OpenROAD ## HDL and Script Generation - **Given language format specification and requirements, LLMs will generate RTL codes and EDA controlling scripts.** - **Besides, how to evaluate the quality of generated codes remains an open research focus, including syntax correctness, functionality equivalence, PPA, and security issues.** 1. ChatEDA: A Large Language Model Powered Autonomous Agent for EDA 2. ChipNeMo: Domain-Adapted LLMs for Chip Design 3. ChipGPT: How far are we from natural language hardware design 4. CodeGen: An Open Large Language Model for Code with Multi-Turn Program Synthesis 5. An Empirical Evaluation of Using Large Language Models for Automated Unit Test Generation 6. RTLLM: An Open-Source Benchmark for Design RTL Generation with Large Language Model 7. GPT4AIGChip: Towards Next-Generation AI Accelerator Design Automation via Large Language Models 8. AutoChip: Automating HDL Generation Using LLM Feedback 9. Chip-Chat: Challenges and Opportunities in Conversational Hardware Design 10. VeriGen: A Large Language Model for Verilog Code Generation 11. Generating Secure Hardware using ChatGPT Resistant to CWEs 12. The Power of Large Language Models for Wireless Communication System Development: A Case Study on FPGA Platform 13. A Deep Learning Framework for Verilog Autocompletion Towards Design and Verification Automation 14. RTLCoder: Outperforming GPT-3.5 in Design RTL Generation with Our Open-Source Dataset and Lightweight Solution 15. VerilogEval: Evaluating Large Language Models for Verilog Code Generation 16. Benchmarking Large Language Models for Automated Verilog RTL Code Generation 17. SpecLLM: Exploring Generation and Review of VLSI Design Specification with Large Language Model 18. Zero-Shot RTL Code Generation with Attention Sink Augmented Large Language Models 19. Make Every Move Count: LLM-based High-Quality RTL Code Generation Using MCTS 20. From English to ASIC Hardware Implementation with Large Language Model 21. EDA Corpus: A Large Language Model Dataset for Enhanced Interaction with OpenROAD 22. CreativEval: Evaluating Creativity of LLM-Based Hardware Code Generation 23. Evaluating LLMs for Hardware Design and Test 24. AnalogCoder: Analog Circuit Design via Training-Free Code Generation 25. Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework 26. SynthAI: A Multi Agent Generative AI Framework for Automated Modular HLS Design Generation 27. Evaluating LLMs for Hardware Design and Test 28. LLM-Aided Testbench Generation and Bug Detection for Finite-State Machines ## Code Analysis and Verification - **We also investigate LLMs' wide application in code analysis, such as bug detecting & fixing, code summarization and security checking.** - **Besides, LLMs have also demonstrated strong ability for verification, e.g. Assertion Based Verification.** 1. ChipNeMo: Domain-Adapted LLMs for Chip Design 2. LLM4SecHW: Leaveri
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matched fp:6d09e1768a2b664d, topic:large-language-models, topic:llm