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An abstraction library for interfacing EDA tools
| Date | Stars |
|---|---|
| 2026-07-25 | 781 |
| 2026-07-28 | 781 |
| 2026-07-30 | 781 |
| 2026-08-06 | 781 |
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Edalize
=======
What's this?
------------
Edalize is a Python Library for interacting with EDA tools. It can create project files for supported tools and run them in batch or GUI mode (where supported).
Award-winning `Edalize introduction video`_
All EDA tools such as Icarus, Yosys, ModelSim, Vivado, Verilator, GHDL, Quartus etc get input HDL files (Verilog and VHDL) and some tool-specific files (constraint files, memory initialization files, IP description files etc). Together with the files, perhaps a couple of Verilog \`defines, some top-level parameters/generics or some tool-specific options are set. Once the configuration is done, a simulation model, netlist or FPGA image is built, and in the case of simulations, the model is also executed, maybe with some extra run-time parameters.
The thing is, all these tools are doing this in completely different ways and there's generally no way to import configurations from one simulator to another.
Dread not! Edalize takes care of this for you. By telling Edalize what files you have, together with some info, what parametrization to use at compile- and run-time (e.g. plusargs, defines, generics, parameters), VPI library sources (when applicable) and any other tool-specific options not already mentioned, it will create the necessary project files and offer to build and run it for you.
This will save you from having to deal with the boring stuff of interfacing the EDA tools yourself, while still have pretty much full power to set up the project the way you want.
It allows you to quickly switch tools, at least when it comes to simulators. This is highly useful to shake out tool-specific bugs, or just to let you work with your weapon of choice.
It can also be used to just get a quick template that you can open up in the tool's GUI if there is such, and continue working from there.
It can be directly integrated as a library for your existing Python-powered HDL project, or can be used stand-alone (soon anyway) to feed Edalize from projects written in other languages.
Install it
----------
Edalize is a Python module.
Find the sources at `github.com/olofk/edalize <https://github.com/olofk/edalize>`__.
Once downloaded, we can install it with following Python command::
$ cd edalize
$ python -m pip install -e .
The reporting modules have been made optional due to their use of a number of dependencies for data analysis.
These can be installed with::
$ python -m pip install -e ".[reporting]"
How to use it?
--------------
Ok, this sounds great.
Now, how do I get started?
Find the documentation at `edalize.rtfd.io <https://edalize.rtfd.io>`__.
Assume we have a project that consists of a Verilog source file called ``blinky.v``.
Then there's also a testbench called ``blinky_tb.v`` and a constraints file for synthesis called ``constraints.sdc``.
You can get those files from `blinky <https://github.com/fusesoc/blinky>`_ and forExcerpt of 7,033 characters
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Carlos Eduardo · RISC-V Ambassador / Red Hat Architect / Independent Developer · Brazil
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Would you bet a product on this? Bounded 0–100 and slow moving.
matched fp:4b0bc3d031df547f, topic:simulation